restoring除法器设计 经典算法了，可以仿真通过-divider restoring a classical algorithm design, simulation can be adopted

restoring divider in verilog

- non-restoring like divider. As in Paper. -- For normalized numbers -- non-restoring like divider. As in Paper. -- For normalized numbers ---------------------------------------------------------------------------------

Division is performed in four stages. After reset, the 8-bit numerator is “loaded” in the remainder register, the 6-bit denominator is loaded and aligned (by 2N− 1 for a N bit numerator), and the quotient register is set to zero. In the second a